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300MHz to 450MHz High-Efficiency,
Crystal-Based +13dBm ASK Transmitter
ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, all RF inputs and outputs are referenced to 50 Ω , V DD = +2.1V to +3.6V, T A = -40°C to +125°C, unless
otherwise noted. Typical values are at V DD = +2.7V, T A = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
PHASE-LOCKED LOOP (PLL)
VCO Gain
330
MHz/V
Phase Noise
Maximum Carrier Harmonics
Reference Spur
Loop Bandwidth
Crystal Frequency
Frequency Pulling by V DD
Crystal Load Capacitance
f XTAL
f RF = 315MHz
f RF = 433MHz
f RF = 315MHz
f RF = 433MHz
f RF = 315MHz
f RF = 433MHz
f OFFSET = 100kHz
f OFFSET = 1MHz
f OFFSET = 100kHz
f OFFSET = 1MHz
-84
-91
-82
-89
-50
-50
-74
-80
1.6
f RF /32
3
3
dBc/Hz
dBc
dBc
MHz
MHz
ppm/V
pF
DATA INPUT
Data Input High
Data Input Low
Maximum Input Current
Pulldown Current
V IH
V IL
V DD -
0.25
10
10
0.25
V
V
μA
μA
CLKOUT OUTPUT
Output Voltage Low
Output Voltage High
Load Capacitance
CLKOUT Frequency
V OL
V OH
C LOAD
I SINK = 650μA (Note 4)
I SOURCE = 350μA (Note 4)
(Note 4)
V DD -
0.25
f XTAL /16
0.25
10
V
V
pF
Hz
Note 1: Supply current, output power, and efficiency are greatly dependent on board layout and PAOUT match.
Note 2: Production tested at T A = +25°C with f RF = 300MHz and 450MHz. Guaranteed by design and characterization over tem-
perature and frequency.
Note 3: 50% duty cycle at 10kbps with Manchester coding.
Note 4: Guaranteed by design and characterization, not production tested.
Note 5: PA output is turned on in test mode by V DATA = V DD /2 + 100mV.
Note 6: PA output is turned off in test mode by V DATA = V DD /2 – 100mV.
Note 7: Wait time: t WAIT = (2 16 x 32)/f RF .
Note 8: Generally limited by PCB layout.
Note 9: V DATA = V IH . Efficiency = P OUT /(V DD x I DD ).
_______________________________________________________________________________________
3
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